The present invention relates to packages of solid-state imaging device for sealing the solid-state imaging device having a plurality of image signal output lines.
An example of package of solid-state imaging device generally used to seal the solid-state imaging device having a plurality of image signal output lines as disclosed in Japanese Patent Application Laid-Open Hei-5-122617 is shown in FIGS. 1A to 1E. FIG. 1A is a top view; FIG. 1B is a front view; FIG. 1C is a sectional view along line c-c in FIG. 1A; FIG. 1D is a side view; and FIG. 1E is a sectional view along line e-e in FIG. 1A. In the package structure of this construction, a solid-state imaging device chip 13 is bonded to a package 10 by means of die bonding and the solid-state image device chip 13 is then connected through bonding wire 14 to a terminal end portion of lead frame 12 which is referred to as an inner lead portion 12A. The inner lead portion 12A itself is extended within the package 10 and becomes an outer lead portion 12B when it is protruded to the outside of the package 10. The package 10 is then hermetically sealed with a glass plate 17.
In recent years, more pixels tend to be employed in the solid-state imaging device to be sealed in a package of solid-state imaging device so that it is necessary to increase the signal reading rate in order to maintain the number of frames to be read out per unit time. For this reason, image signals are read out by using a plurality of signal output lines (multi-line readout). Examples of the solid-state imaging device having a plurality of image signal output lines are shown in FIGS. 2 to 4.
Of the solid-state imaging device shown in FIG. 2, a light receiving area 1000 is divided into four regions of A, B, C, D so that image signals respectively of the divided regions A to D are outputted in parallel with respect to each other. In particular, the image signals of region A in the light receiving area 1000 are to be outputted to A-output pad 1120 through an output amplifier 1130 by a vertical scanning circuit 1110 and horizontal read circuit 1100. Similarly, the image signals of region B are read out to B-output pad 1121 through an output amplifier 1131 by a vertical scanning circuit 1111 and horizontal read circuit 1101; the image signals of region C are read out to C-output pad 1122 through an output amplifier 1132 by a vertical scanning circuit 1112 and horizontal read circuit 1102; and the image signals of region D are outputted to D-output pad 1123 through an output amplifier 1133 by a vertical scanning circuit 1113 and horizontal read circuit 1103. By thus effecting the image signal read operation in parallel, the image signals can be read out in ¼ the time in the case where the light receiving area is not divided. In the case of this construction, if image outputs from the respective output amplifiers 1130, 1131, 1132, 1133 are to be fetched to the outside of the solid-state imaging device through a shortest wiring route, the output pads 1120, 1121, 1122, 1123 are to be disposed at the four corners of the solid-state imaging device.
The solid-state imaging device shown in FIG. 3 is constructed so that a pixel array of light receiving area 1000 is read out by two pixel columns at a time in parallel. The odd-numbet pixel columns 1-1, 2-1, 3-1, . . . n-1 of the light receiving area 1000 are read out to an output pad 1220-1 through an output amplifier 1230-1 by a vertical scanning circuit 1210 and horizontal read circuit 1200-1, and in a similar manner, the even-number pixel columns 1-2, 2-2, 3-2, . . . n-2 are read out through an output amplifier 1230-2 by the vertical scanning circuit 1210 and a horizontal read circuit 1200-2. By thus effecting the image signal read operation in parallel, the read time can be shortened to ½. In the case of this construction, if image outputs from the respective output amplifiers 1230-1, 1230-2 are to be fetched through a shortest wiring route to the outside of the solid-state imaging device, the two outputting sections are disposed in a close proximity to each other for example by locating the output pads 1220-1, 1220-2 next to each other.
Shown in FIG. 4 is a solid-state imaging device where the read methods of image signals shown in FIGS. 2 and 3 are combined. In particular, the solid-state imaging device shown in FIG. 4 makes readout at a yet higher rate possible such that, of the read regions obtained by dividing the light receiving area 1000 into four portions, two pixel columns are concurrently read out by the method shown in FIG. 3. FIG. 4 includes: A1-1, A1-2, . . . D2-1, D2-2, . . . , divided pixel columns; 1300-1, . . . 1303-2, horizontal read circuits; 1310, . . . 1313, vertical scanning circuits; 1320-1, . . . 1323-2, output pads; and 1330-1, . . . 1333-2, output amplifiers. In the case of this construction, if image outputs from the respective output amplifiers 1330-1, . . . 1333-2 are to be fetched through a shortest wiring route to the outside of the solid state imaging device, the output pads in each pair 1320-1/1320-2, 1321-1/1321-2, 1322-1/1322-2, 1323-1/1323-2 are disposed next to each other and the pairs of the output pads are disposed at the four corners of the solid-state imaging device, respectively.